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This paper analyzes two alternative under bump metallurgy (UBM) structures: sputtered TiW/Ni and electroless Ni/immersion Au (ENIG), with and without Pd. Wafers were fabricated with these UBM structures, solder applied with C4NP, and chip level stressing performed to determine the robustness of these alternative stack-ups. Microelectronic packaging continues the migration from wire bond to flip chip first level interconnect (FLI) to meet aggressive requirements for improved electrical performance, reduced size and weight. Analysis of these structures following multiple reflows and thermal cycling is presented.