By Topic

Dual-Bit Gate-Sidewall Storage FinFET NVM and New Method of Charge Detection

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)

A FinFET-based nonvolatile memory (NVM) cell design with two separate gate-sidewall charge-storage sites is presented for the first time. The conventional read method and/or a newly proposed read method can be used to identify the charge- storage state of each bit in the cell. The new read method allows the state of each bit to be determined by a forward read operation, and it is compatible with a gate-overlapped source/drain structure that offers improved ON-state conductance in contrast to the conventional read method. The dual-bit FinFET cell design can be used to achieve very high NVM storage density because of its high scalability and compatibility with standard CMOS process technology.

Published in:

IEEE Electron Device Letters  (Volume:28 ,  Issue: 6 )