A 10-bit 200MS/s A/D converter (ADC) for highspeed video signal digitizer is presented. The ADC has a 14- bit pipeline ADC core for digital programmable gain control and a reference voltage buffer optimized for high-speed A/D conversion. The ADC is fabricated in a 0.18-mum multiple Vth CMOS process. The area of ADC core is 1.15 mmtimes0.69 mm, and power consumption is 128 mW@200 MS/s. The measured INL and DNL are 1.05 LSB and 0.55 LSB respectively. The measured SNR and SFDR are 54.8 dB and 63.2 dB respectively.
Published in:
Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian
Date of Conference: 13-15 Nov. 2006