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Output Impedance Oriented Design for Voltage Regulator wvith High Repetitive Rate Transient

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2 Author(s)
Wenkai Wu ; International Rectifier, 200 Circuit Drive, North Kingstown, RI 02852. Tel: 401-667-0238, Email: ; George Schuellein

Modern microprocessors can rapidly shift between a sleep state and full load operation, placing a heavy requirement on the voltage regulator to stabilize its output voltage. High repetitive rate transient poses new challenges for voltage regulator design. The old "rule of thumb" approaches for capacitor selection may not be optimized in terms of physical size, performance, and cost. In this paper, output impedance oriented voltage regulator design methodology and procedure is presented to pursue the cost effective solution.

Published in:

APEC 07 - Twenty-Second Annual IEEE Applied Power Electronics Conference and Exposition

Date of Conference:

Feb. 25 2007-March 1 2007