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Adaptive Multi-Sensor Interface System-On-Chip

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4 Author(s)
Jinwen Xi ; Michigan State Univ., East Lansing ; Chao Yang ; Mason, A. ; Peixin Zhong

This paper presents a system-on-chip using 0.18 mum CMOS technology that integrates an 8 channel reconfigurable sensor interface with an 8-bit Sigma-Delta A/D converter and a 16-bit sensor signal processor. The configurable sensor interface employs Wheatstone bridge and switched-capacitor topologies to efficiently perform signal conditioning for a wide range of resistive and capacitive sensors. The customized processor executes software for sensor interface configuration and calibration, data conversion control, sensor data calibration and compensation, and communication with external systems. On the 4 times 4 mm chip with a 1.8 V supply, the sensor readout circuit requires only 300 muA and the processor power consumption is 209 muW/MHz. The adaptive multi-sensor interface provides a platform solution with the flexibility crucial for implementing low-cost microsystems of the future.

Published in:

Sensors, 2006. 5th IEEE Conference on

Date of Conference:

22-25 Oct. 2006

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