By Topic

VLSI Implementation of a 600-Mbps MIMO-OFDM Wireless Communication System

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Shingo Yoshizawa ; Graduate School of Information Science and Technology, Hokkaido University, Sapporo, Japan. ; Yoshikazu Miyanaga

This paper presents a VLSI implementation of a high throughput MIMO-OFDM system in wireless communications. We explore the optimum parameters in a new packet OFDM frame by expanding the IEEE802.11a standard. The proposed system provides a maximum of 600 Mbps by use of an 80-MHz baseband bandwidth and a 2 times 2 MIMO scheme. The proposed system is implemented into hardware according to a full-pipelined architecture. In the MIMO detection circuit, we adopt a low latency architecture to satisfy the timing constraint required for real-time MIMO detection. In a 90-nm CMOS technology, the system performing MMSE-V-BLAST detection has 3.9 millions in logic gates and consumes 584 mW in power dissipation

Published in:

APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems

Date of Conference:

4-7 Dec. 2006