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Reliability issues in advanced High k/metal gate stacks for 45 nm CMOS applications

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7 Author(s)
G. Groeseneken ; IMEC, Kapeldreef 75, B-3001 Leuven, Belgium, Phone +32-16-281269; KU Leuven, ESAT-Department, Leuven, Belgium. Email: Guido.groeseneken@imec.be ; M. Aoulaiche ; S. De Gendt ; R. Degraeve
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Some recent insights in reliability issues of high k/metal gate stacks for the 45 nm CMOS node and beyond are discussed. The problem of transient charging effects leading to threshold voltage instability is illustrated. It is shown that nitridation of Hf-silicate layers leads to severe degradation of the negative-bias-instability (NBTI) lifetime. Some insights in the mechanisms of time-dependent-dielectric breakdown (TDDB) are discussed and illustrated

Published in:

2006 International Conference on Advanced Semiconductor Devices and Microsystems

Date of Conference:

Oct. 2006