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With the ever increasing signal speeds, signal integrity issues of high-speed VLSI designs are presenting increasingly difficult challenges for state-of-the-art modeling and simulation tools. Consequently, characterization and passive macromodeling of high-speed modules such as interconnects, vias, and packages based on tabulated data are becoming important. This paper presents a fast algorithm for passivity verification and enforcement of large order macromodels of scattering parameter based multiport subnetworks. Numerous examples tested on this algorithm demonstrate a significant speed-up compared to the existing algorithms in the literature
Published in:
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
(Volume:15
,
Issue:
1
)
Date of Publication: Jan. 2007
- Page(s):
- 48 - 59
- ISSN :
- 1063-8210
- INSPEC Accession Number:
- 9439231
- Digital Object Identifier :
- 10.1109/TVLSI.2007.891085
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 26 February 2007
- Issue Date :
- Jan. 2007
- Sponsored by :
- IEEE Circuits and Systems Society
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