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Communication Interface Generation For HW/SW Architecture In The STARSoC Environment

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3 Author(s)
Abdelhalim Samahi ; LE2I Laboratory, CNRS UMR 5158, BP 47870, University of Burgundy, Dijon, France. ; El-bay Bourennane ; Sami Boukhechem

Mapping the application functionality to software and hardware requires automated methods to specify, generate and optimize the hardware, software and the interface architectures between them. In this paper, we present a methodology flow to hardware-software communication synthesis for system-on-a-chip (SoC) design through STARSoC (synthesis tool for adaptive and reconfigurable system-on-a-chip) tool for rapid prototyping. Our concept consists of a set of hardware and software processes, described in C-code, communicates through the streams channels. This methodology consists in analyzing dependences of data between processes and synthesis a custom architecture to interface it. Firstly, we presented our reference platform design proposed and the programming model supported. Secondly, we discussed the communication synthesis flow and we presented our architecture models synthesized. Finally, we presented the experimental results of our methodology and demonstrate the effectiveness of our automatic model generation for SoC through the image processing applications

Published in:

2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006)

Date of Conference:

Sept. 2006