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Automatic Scaling Procedures for Analog Design Reuse

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4 Author(s)
Savio, A. ; Dept. of Electron., Brescia Univ. ; Colalongo, L. ; Quarantelli, M. ; Kovacs-Vajna, Z.M.

In this paper, a methodology for analog design reuse is proposed. The basic idea is to keep the circuit topology unchanged while automatically modifying the MOSFETs aspect ratio in order to control the transistor transconductances gm and output conductances gDS. If gm's and gDS's of each transistor are kept unchanged through the scaling procedure, we show that the overall frequency behavior of the scaled circuit remains very similar to the original one. The approach is very simple and it is suitable for the scaling of analog circuits. No input and output terminals have to be defined and it can be straightforwardly implemented in an automatic scaling tool. When this approach fails, more complex iterative numerical loops may be adopted. In order to validate and compare the scaling approaches, several linear and nonlinear circuits were scaled from a 0.25-mum, 2.5-V voltage supply to a 0.15-mum, 1.2-V voltage supply in standard CMOS technologies

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:53 ,  Issue: 12 )