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Adding hardware for testability in synthesized data paths

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3 Author(s)
Steensma, J. ; IMEC Lab., Leuven, Belgium ; Catthoor, F. ; De Man, H.

A technique for automatically adding hardware for testability is proposed. The technique is closely integrated with a symbolic test method which can deal with realistic data paths. The symbolic test technique is based on novel controllability and observability descriptions. These descriptions are also used for the testability analysis. In case of testability problems, various ways to add hardware are considered and an algorithm which finds the optimal set of hardware solutions is given

Published in:

Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on

Date of Conference:

22-25 Feb 1993

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