Referenced Items are not available for this document.
Carry-save multipliers require an adder at the last step to convert the carry-sum representation of the most significant half of the result into an irredundant form. A multiplication scheme where by this conversion is performed with a circuit operating in parallel with the carry-save array is presented. The resulting implementation, when a radix-2 adder array is used, produces a result on 2n bits with a delay comparable to that of the multiplier proposed by M.D. Ercegovac and T. Lang (1990). When a radix-4 array is used, the proposed unit is almost twice as fast as units proposed previously
Published in:
Computer Arithmetic, 1993. Proceedings., 11th Symposium on
Date of Conference: 29 Jun-2 Jul 1993
- Page(s):
- 54 - 61
- Meeting Date :
- 29 Jun 1993-02 Jul 1993
- Print ISBN:
- 0-8186-3862-1
- INSPEC Accession Number:
- 4885356
- Conference Location :
- Windsor, Ont.
- Digital Object Identifier :
- 10.1109/ARITH.1993.378109
- Product Type:
- Conference Publications
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