Cart (Loading....) | Create Account
Close category search window
 

On digit-recurrence division implementations for field programmable gate arrays

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Louie, M.E. ; Dept. of Comput. Sci. Dept., California Univ., Los Angeles, CA, USA ; Ercegovac, M.D.

The flexibility of field programmable gate arrays (FPGAs) can provide arithmetic-intensive programs with the benefits of custom hardware but without the high cost of custom silicon implementations. Efficient mappings are key to fast arithmetic implementations on FPGAs. A process for developing such mappings with lookup table based FPGAs is explored. The development process is illustrated with SRT division and the Xilinx XC4010 FPGA. With this mapping process a linear sequential array design that avoids the common problem of large fanout delay in the critical path is created. This approach has a cycle time that is independent of precision, yet it requires approximately the same number of logic blocks as a conventional implementation

Published in:

Computer Arithmetic, 1993. Proceedings., 11th Symposium on

Date of Conference:

29 Jun-2 Jul 1993

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.