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A 10 bit 20 MS/s 3 V supply CMOS A/D converter

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8 Author(s)
Ito, Masao ; System LSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan ; Miki, T. ; Hosotani, S. ; Kumamoto, T.
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A 10 bit CMOS A/D converter with 3 V power supply has been developed for being integrated into system VLSI's. In this A/D converter, redundant binary encoders named “twin encoders” enhance tolerance to substrate noise, together with employing differential amplifiers in comparators. The bias circuit using a replica of the amplifier is developed for biasing differential comparators with 3 V power supply. Subranging architecture along with a multilevel tree decoding structure improves dynamic performance of the ADC at 3 V power supply. The A/D converter is fabricated in double-polysilicon, double-metal, 0.8 μm CMOS technology. The experimental results show that the ADC operates at 20 MS/s and the twin encoders suppress the influence of substrate noise effectively. This ADC has a single power supply of 3 V, and dissipates 135 mW at 20 MS/s operation

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:29 ,  Issue: 12 )

Date of Publication:

Dec 1994

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