Instruction-set matching and selection for DSP and ASIP code generation

The increasing use of digital signal processors (DSPs) and application specific instruction-set processors (ASIPs) has put a strain on the perceived mature state of compiler technology. The presence of custom hardware for application-specific needs has introduced instruction types which are unfamiliar to the capabilities of traditional compilers. Thus, these traditional techniques can lead to inefficient and sparsely compacted machine microcode. In this paper, we introduce a novel instruction-set matching and selection methodology, based upon a rich representation useful for DSP and mixed control-oriented applications. This representation shows explicit behaviour that references architecture resource classes. This allows a wide range of instructions types to be captured in a pattern set. The pattern set has been organized in a manner such that matching is extremely efficient and retargeting to architectures with new instruction sets is well defined. The matching and selection algorithms have been implemented in a retargetable code generation system called CodeSyn