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Genesis: a behavioral synthesis system for hierarchical testability

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2 Author(s)
S. Bhatia ; Dept. of Electr. Eng., Princeton Univ., NJ, USA ; N. K. Jha

Previous research in the area of behavioral synthesis of digital circuits has mostly concentrated on optimizing area and performance. We present a behavioral data path synthesis system, called Genesis, which is geared towards hierarchical testability. A test environment for each module in the data path is guaranteed during allocation such that it becomes possible to justify any desired test set at module inputs from system inputs, and propagate fault effects from module outputs to system outputs. Genesis provided 100% system-level testability for all the synthesized benchmarks with a three-to-four orders of magnitude improvement in test generation time as compared to an efficient gate-level sequential test generator. The area overhead of circuits synthesized by Genesis is usually zero over circuits synthesized by other behavioral synthesis systems which disregard testability. Genesis can also easily handle loop constructs in the behavioral specification

Published in:

European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.

Date of Conference:

28 Feb-3 Mar 1994