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Over-the-cell routing algorithms for industrial cell models

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4 Author(s)
S. Bhingarde ; Microprocessor Div., Intel Corp., Hillsboro, OR, USA ; R. Khawaja ; A. Panyam ; N. A. Sherwani

The effective utilization of over-the-cell areas for routing leads to minimization or elimination of channel areas in standard cell designs. In this paper, we present two results. Firstly, we develop a new cell model called Target Based Cell (TBC) designs. Standard cells in TBC designs have terminals in the form of vertical segments in M1 layer. The exact locations for placing interconnect contacts on the targets are determined by the routing algorithms. Cell widths in TBC designs are smaller than the widths in existing cell designs and have improved over-the-cell routing flexibility. Secondly, we develop an efficient router for TBC designs which includes two key features; an optimal O(KL) algorithm (where K, and L are number of cell rows and layout width respectively) for assigning over-the-cell area to each channel, so as to minimize total layout height, and an irregular boundary channel HV-HVH-HV router for over-the-cell and channel areas between terminal rows which optimally utilizes the over-the-cell area

Published in:

VLSI Design, 1994., Proceedings of the Seventh International Conference on

Date of Conference:

5-8 Jan 1994