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Sequential circuit design using synthesis and optimization

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6 Author(s)
Sentovich, E.M. ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Singh, K.J. ; Moon, C. ; Savoj, H.
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A description is given of SIS, an interactive tool for synthesis and optimization of sequential circuits. Given a state transition table or a logic-level description of a sequential circuit, SIS produces an optimized net-list in the target technology while preserving the sequential input-output behavior. Many different programs and algorithms have been integrated into SIS, allowing the user to choose among a variety of techniques at each stage of the process. It is built on top of MISII and includes all (combinational) optimization techniques therein as well as many enhancements. SIS serves as both a framework within which various algorithms can be tested and compared and as a tool for automatic synthesis and optimization of sequential circuits

Published in:

Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on

Date of Conference:

11-14 Oct 1992