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CHARM2: towards an industry-standard wafer surface-charge monitor

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3 Author(s)
W. Lukaszek ; Center for Integrated Syst., Stanford Univ., CA, USA ; E. Quek ; W. Dixon

The rationale and the content of the CHARM2 test chip, and an experimental program using it to develop an industry-standard wafer surface charging monitor, are discussed. The EEPROM-based monitors are based on the observation that most of the charging damage to IC structures associated with ion- and plasma-based processes is due to the transport and trapping of charges in the oxides of IC device structures. Therefore, to effectively monitor a broad spectrum of charge damage effects, it is sufficient to monitor the magnitudes of the driving forces behind the generation and transport of charges through oxides, namely, the potentials developed across oxides and the magnitudes of process UV emissions

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop, 1992. ASMC 92 Proceedings. IEEE/SEMI 1992

Date of Conference:

30 Sep-1 Oct 1992