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Highly reliable process insensitive 3.3 V-5 V interface circuit

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5 Author(s)
Y. Wada ; Toshiba Corp., Kawasaki, Japan ; J. Gotoh ; H. Takakura ; T. Iida
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By adopting a new process-insensitive output circuit, with a depression-type transistor and a new DC current free input circuit, a highly reliable 3.3-V-5-V interface circuit has been developed. Using a separated input-output structure, the circuit achieves a wide operating voltage range of 2.7 V to 3.6 V and a wide process margin. A reliable n-p-n lateral bipolar device yields a high ESD failure threshold. The circuit is fabricated by means of a 0.6- mu m standard CMOS process without multioxide.<>

Published in:

VLSI Circuits, 1992. Digest of Technical Papers., 1992 Symposium on

Date of Conference:

4-6 June 1992