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A 6 ns 1 Mb CMOS SRAM with high-performance sense amplifier

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8 Author(s)
T. Seki ; Fujitsu VLSI Ltd., Kasugai, Japan ; E. Itoh ; C. Furukawa ; I. Maeno
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A 1-Mb (256 K*4) SRAM with an access time of 6 ns using a 0.5- mu m CMOS technology is described. Fast access and low power dissipation are achieved by using a new nMOS source-controlled latched sense amplifier and a data output pre-reset circuit that reduces the output transition time.<>

Published in:

VLSI Circuits, 1992. Digest of Technical Papers., 1992 Symposium on

Date of Conference:

4-6 June 1992