Referenced Items are not available for this document.
The concepts of the low-conductance drain (LCD) design approach for lattice-matched InAlAs/InGaAs/InP HEMTs are demonstrated for improved device performance. The tradeoff for LCD HEMT characteristics is a tapered current gain cutoff frequency f/sub t/ under high drain-to-source bias. This behavior is, in principle, due to the fact that the LCD approach increases the effective gate length of the HEMTs in exchange for reduced peak channel electric field. Two-dimensional PISCES simulation was used to optimize the improvements while simultaneously minimizing this undesirable effect for an LCD HEMT structure.<
Published in:
Electron Device Letters, IEEE
(Volume:13
,
Issue:
10
)
Date of Publication: Oct. 1992
- Page(s):
- 535 - 537
- ISSN :
- 0741-3106
- INSPEC Accession Number:
- 4283647
- Digital Object Identifier :
- 10.1109/55.192824
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Oct. 1992
- Sponsored by :
- IEEE Electron Devices Society
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
