Residue arithmetic based multiple-valued VLSI image processor

An ultra-high-performance VLSI image processor based on a multivalued residue arithmetic circuit is proposed for robot vision. Data communication between the mod m/sub i/ arithmetic units is not necessary in the residue arithmetic system, so that multiple mod m/sub i/ arithmetic units can be on different chips. Therefore, a number of mod m/sub i/ multiplier adders can be implemented on a single VLSI chip based on the modulus-slice concept. Each mod m/sub i/ arithmetic unit can be effectively implemented in parallel using the concept of pseudoprimitive root and multivalued current-mode circuit technology. Thus, the use of parallelism throughout makes the performance very high in comparison with the ordinary binary implementation.<
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