By Topic

Integrated pin electronics for VLSI functional testers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
J. A. Gasbarro ; Xerox Palo Alto Res. Center, CA, USA ; M. A. Horowitz

A fully integrated approach is presented for building the pin electronics portion of a VLSI functional tester. The system implements the output vector timing and formatting functions, as well as the input sampling and comparison operations. A computer-controlled feedback loop is employed to obtain a timing accuracy of better than 1 ns. Novel circuit designs are shown which make the circuit suitable for fabrication in a high-density MOS technology. An experimental chip using these techniques was fabricated in 2- mu m CMOS technology and functioned at over 30 megavectors per second.<>

Published in:

IEEE Journal of Solid-State Circuits  (Volume:24 ,  Issue: 2 )