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SET to RESET Programming in Phase Change Memories

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2 Author(s)
I. V. Karpov ; Intel Corp., Santa Clara, CA ; S. A. Kostylev

Experimental data on details of SET (crystalline) to RESET (amorphous) transition are presented for Ge2Sb2Te 5 (GST) nonvolatile memory cell. It is shown that the main source of heat for a SET to RESET transition is the GST bulk and interface regions instead of the contacting electrode. A small-contact-area electrode is used primarily to supply current into and minimize heat loss from the chalcogenide. Increasing bottom contact resistivity offers a scaling path for RESET current with no electrical penalties

Published in:

IEEE Electron Device Letters  (Volume:27 ,  Issue: 10 )