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Energy consumption in RC tree circuits

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3 Author(s)
M. Alioto ; Dipt. di Ingegneria dell'Informazione, Siena Univ., Italy ; G. Palumbo ; M. Poli

In this paper, resistance-capacitance (RC) tree networks are modeled in terms of their energy consumption associated with an input transition. This work significantly extends the results that the same authors previously obtained in the specific case of ladder networks with only ramp signals. The proposed approach to model the energy consumption is based on a single-pole approximation, in which an equivalent time constant is analytically derived from an exact analysis for very slow and very fast input transitions. The model is then extended to arbitrary values of the input rise time by exploiting some intrinsic properties of RC tree networks. The approach is completely analytical and leads to closed-form results. Analytical results are explicitly derived for different inputs, such as the ramp and the exponential waveforms which are usually encountered in current VLSI circuits, as well as the saturated sine input. Due to its simplicity, the proposed energy expression is suitable for pencil-and-paper evaluation and allows for an intuitive understanding of the network dissipation. The energy expression proposed is shown to be accurate enough for modeling purposes through comparison with SPICE simulations.

Published in:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems  (Volume:14 ,  Issue: 5 )