By Topic

The enhancement of Q factor for patterned ground shield inductors at high temperatures

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Jinglin Shi ; Inst. of Microelectron., Singapore, Singapore ; W. -Y. Yin ; Huailin Liao ; Jun-Fa Mao

We report on an effective way of using a patterned ground shield (PGS) to enhance the Q factor of on-chip spiral inductors. We fabricated PGS inductors using both 0.18 μm and 0.35 μm CMOS processes, with M1 and poly strip PGSs, respectively. The strip width and spacing of the PGSs are Wg=0.8 μm and Sg=0.45 μm, with metal thicknesses of tp={0.54,0.2} μm in the 0.18 μm process, and tp={0.6,0.3} μm in the 0.35 μm process. The separation distance D between PGS and top metal layer is different in both processes. We found that the Q factor degradation of inductors at high temperatures can be effectively compensated by using PGS. Among all geometric parameters of a PGS in the 0.18 μm process, the parameter D is the critical factor for the shielding effectiveness, and M1 PGS is much more efficient than poly strip PGS in improving the inductor performance over the temperature range of 298 K to 358 K. However, in the 0.35 μm process the latter is better than the former.

Published in:

IEEE Transactions on Magnetics  (Volume:42 ,  Issue: 7 )