Referenced Items are not available for this document.
Plasma etching is a key process for pattern formation in integrated circuit (IC) manufacturing. Unfortunately, pattern dependent non-uniformities arise in plasma etching processes due to microloading and RIE lag. We contribute a semi-empirical methodology for capturing and modeling pattern dependent effects in plasma etching of ICs. We apply this methodology to the study of interconnect trench etching, and show that an integrated model is able to predict both pattern density and feature size dependent non-uniformities in trench depth
Published in:
Advanced Semiconductor Manufacturing Conference, 2006. ASMC 2006. The 17th Annual SEMI/IEEE
Date of Conference: 22-24 May 2006
- Page(s):
- 77 - 82
- ISSN :
- 1078-8743
- Print ISBN:
- 1-4244-0254-9
- INSPEC Accession Number:
- 9085380
- Conference Location :
- Boston, MA
- Digital Object Identifier :
- 10.1109/ASMC.2006.1638727
- Product Type:
- Conference Publications
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