Cart (Loading....) | Create Account
Close category search window
 

DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Albrecht, C. ; University of Lubeck, Lubeck, Germany ; Foag, J. ; Koch, R. ; Maehle, E.

Network processors are special purpose processors, tailored to the needs of packet processing in internet routers. Network processors are, in general, freely programmable devices. However, their performance in payload processing relies on specific tasks to be accelerated by fixed purpose coprocessors which are integrated into the device. As a solution to overcome the restrictions of flexibility, a dynamically adaptable coprocessor based on dynamically and partially reconfigurable logic (DynaCORE) is proposed.

Published in:

Parallel, Distributed, and Network-Based Processing, 2006. PDP 2006. 14th Euromicro International Conference on

Date of Conference:

15-17 Feb. 2006

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.