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A FPGA Implementation of An Open-Source Floating-Point Computation System

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6 Author(s)
C. Brunelli ; Institute of Digital and Computer Systems Tampere University of Technology P.O. box 553, FIN-33101, Tampere, Finland, Email: ; F. Garzia ; J. Nurmi ; C. Mucci
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FPGAs are commonly used to provide a fast way to system prototyping. Thanks to their ever increasing amount of logic elements, their massively parallel architectures, and their dedicated computational elements they offer the possibility to implement entire complex systems like SoCs, reaching computational performances comparable to ASIC logic or embedded processors in a broad range of applications. This paper presents the implementation on a FPGA board of an open source, technology independent, VHDL model of a floating-point computation environment for SoCs, composed of a RISC microprocessor system closely coupled to a floating-point unit. The FPU features a full hardware handling of normalization and denormalization hazards. A benchmark suite of DSP algorithms written in C language has been run on the proposed platform.

Published in:

2005 International Symposium on System-on-Chip

Date of Conference:

17-17 Nov. 2005