By Topic

Built-in self-test of MEMS accelerometers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Deb, N. ; Dept. of Electr., Comput. Eng. Carnegie Mellon Univ., Pittsburgh, PA, USA ; Blanton, R.D.

A built-in self-test technique that is applicable to symmetric microsystems is described. A combination of existing layout features and additional circuitry is used to make measurements from symmetrically located points. In addition to the normal sense output, self-test outputs are used to detect the presence of layout asymmetry that are caused by local, hard-to-detect defects. Simulation results for an accelerometer reveal that our self-test approach is able to distinguish misbehavior resulting from local defects and global manufacturing process variations. A mathematical model is developed to analyze the efficacy of the differential built-in self-test method in characterization of a wide range of local manufacturing variations affecting different regions of a device and/or wafer. Model predictions are validated by simulation. Specifically, it has been shown that by using a suitable modulation scheme, sensitivity to etch variation along a particular direction is improved by nearly 30%.

Published in:

Microelectromechanical Systems, Journal of  (Volume:15 ,  Issue: 1 )