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The Standard Transistor Array (STAR) design system is a two-layer metal semicustom approach to generating random logic MOS digital circuits. The STAR design system is a part of the Large Scale Microelectronics Computer-Aided Design and Test (CADAT) system . The STAR design automated system includes a STAR-PLACE automatic placement program, a STAR-COMPILE compiling program, a STAR-ROUTE automatic routing program, a STAR-PRINT display program, and the ARTWORK-MANART artwork generation program. The basic STAR array, array technologies, STAR logic cell design, STAR application software, and example STAR circuit layouts are discussed in this paper.