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A VLSI analog computer/digital computer accelerator

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3 Author(s)
G. E. R. Cowan ; Dept. of Electr. Eng., Columbia Univ., New York, NY, USA ; R. C. Melville ; Y. P. Tsividis

The design of a single-chip VLSI analog computer fabricated in a 0.25-μm CMOS process is described. It contains 80 integrators, 336 other linear and nonlinear analog functional blocks, switches for their interconnection, and circuitry to enable the system's programing and control. The IC is controlled, programmed and measured by a PC via a data acquisition card. This arrangement has been used to simulate ordinary differential equations (ODEs), partial differential equations, and stochastic differential equations with moderate accuracy, significantly faster than a modern workstation. Techniques for using the digital computer to refine the solution from the analog computer are presented. Solutions from the analog computer have been used to accelerate a digital computer's solution of the periodic steady state of an ODE by more than 10×. The IC occupies 1 cm2 and consumes 300 mW. An analysis has been done showing that the analog computer dissipates 0.02% to 1% of the energy of a general purpose digital microprocessor and about 2% to 20% of the energy of a digital signal processor, when solving the same differential equation.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:41 ,  Issue: 1 )