A 10mW 81dB cascaded multibit quadrature /spl Sigma//spl Delta/ ADC with a dynamic element matching scheme

A multibit 2-0 cascaded quadrature /spl Sigma//spl Delta/ modulator is presented which attains 81 dB dynamic range in a 200kHz bandwidth at an IF of 10MHz. A simple dynamic element matching (DEM) scheme minimizes the mirror in-band aliases caused by mismatch between the I and Q channel. The integral nonlinearity (INL) errors from the multibit feedback DAC are noise-shaped by a quadrature variant of the data weighted averaging algorithm (DWA). Clocked at 13.1 MHz, the ADC consumes 10mW from a 2.1 V supply.