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An on-chip self-calibration method for current mismatch in D/A converters

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4 Author(s)
Radulov, G.I. ; Eindhoven Univ. of Technol., Netherlands ; Quinn, P.J. ; Hegt, H. ; van Roermund, A.

This paper presents an on-chip low-power self-calibration apparatus implemented in a 12-bit current-steering 250nm CMOS DAC. The DAC core consists of a noncalibrated binary LSB part and a calibrated thermometer MSB part. The thermometer currents are generated by combining a coarse 10-bit accurate current with a fine calibrating current provided by a small calibrating DAC (CALDAC). The magnitude of the fine current is determined in the digital domain and optimized for overall post-calibration accuracy. This digital process acquires mismatch error information from on an on-chip single bit ADC. The whole calibration process is executed once at chip power-up and the calibration results are recorded. During the normal operation of the DAC, no active calibration operations are present and the fine currents are kept static, so that the advantages of calibration are maintained even at very high conversion rates. The self-calibrated DAC achieves 12-bit static and dynamic linearity, while occupying smaller silicon area due to the intrinsic 10-bit accuracy of the DAC core.

Published in:

Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European

Date of Conference:

12-16 Sept. 2005