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Low-voltage MOS linear transconductor/squarer and four-quadrant multiplier for analog VLSI

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2 Author(s)
A. Demosthenous ; Dept. of Electron. & Electr. Eng., Univ. Coll. London, UK ; M. Panovic

Analog computations such as four-quadrant multiplication, linear voltage-to-current conversion and sum-square or difference-square are fundamental for many analog signal processing systems. All these functions can be realized based on the principle of the linearized differential pair using floating-voltage sources. This paper describes an improved practical realization of this principle, which is particularly suited to analog VLSI computational systems. The proposed class-AB analog cells are very compact, exhibit low total harmonic distortion and low nonlinearity, have a wide bandwidth, and are compatible with low-power and low-voltage operation. A mathematical discussion on stability and harmonic distortion of the proposed realization is presented. Both simulated results and measurements from fabricated cell samples in a 0.8-μm CMOS process are given. The described circuits operate from a single 2-V power supply.

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IEEE Transactions on Circuits and Systems I: Regular Papers  (Volume:52 ,  Issue: 9 )