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A 90 nm 512 Mb 166 MHz multilevel cell flash memory with 1.5 MByte/s programming

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22 Author(s)
M. Taub ; Intel Corp., Folsom, CA, USA ; R. Bains ; G. Barkley ; H. Castro
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A 2b/cell flash memory in 90 nm triple-well CMOS technology achieves 1.5 MB/s programming and 166 MHz synchronous operation. The design features 2-row programming, optimized program control hardware, 3 transistor x-decoder with negative deselected rows and configurable output buffers. The die is 42.5 mm2 with a cell size of 0.076 μm2.

Published in:

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.

Date of Conference:

10-10 Feb. 2005