By Topic

A time-based energy-efficient analog-to-digital converter

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
H. Y. Yang ; Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA ; R. Sarpeshkar

Dual-slope converters use time to perform analog-to-digital conversion but require 2N+1 clock cycles to achieve N bits of precision. We describe a novel current-mode algorithm that also uses time to perform analog-to-digital conversion but requires 5N clock cycles to achieve N bits of precision via a successive subranging technique. The algorithm requires one asynchronous comparator, two capacitors, one current source, and a state machine. Amplification of two is achieved without the use of an explicit amplifier by simply doing things twice in time. The use of alternating voltage-to-time and time-to-voltage conversions provides natural error cancellation of comparator offset and delay, 1/f noise, and switching charge-injection. The use of few components and an efficient mechanism for amplification and error cancellation allow for energy-efficient operation: in a 0.35-μm implementation, we were able to achieve 12 bit of DNL limited precision or 11 bit of thermal noise-limited precision at a sampling frequency of 31.25 kHz with 75 μW of total analog and digital power consumption. These numbers yield a thermal noise-limited energy efficiency of 1.17 pJ per quantization level, making it one of the most energy-efficient converters to date in the 10-12 bit precision range.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:40 ,  Issue: 8 )