Characterization and modeling of the trench surface inversion problem for the trench isolated CMOS technology

The trench surface inversion problem for the trench isolated CMOS technology was studied with special emphasis on the N-well CMOS technology where the problem is most severe. Using special trench surface inversion test structures, the charge density (Q
ss
) at the trench surface has been determined to be about 2E11 cm
^-2
. Latch-up characteristics of trench isolated structures are also characterized. Two dimensional simulations of the trench isolation structure show that Q
ss
along the trench surface has to be maintained at 5E10 cm
^-2
if the substrate doping concentration remains at 6E14cm
^-3
. To prevent trench surface inversion, higher substrate doping, lower N-well bias and more negative substrate bias are recommended. Trench isolation is more suitable for P-well or N-well with p/p+ epi technologies.