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Packaging of multi-core microprocessors: tradeoffs and potential solutions

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7 Author(s)
P. Muthana ; Sch. of Electr. & Comput. Eng. Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA ; P. Swaminathan ; R. Tummala ; V. Sundaram
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Power consumption and interconnect latency are becoming major bottlenecks in the design of high performance computers and microprocessors. In this paper we propose to use a multicore processor approach to improve the performance of a processor. This paper discusses an analysis of the performance trade offs between single and multicore processors based on power, frequency, bandwidth and the role of embedded passives with high density wiring in future packages to support such processors.

Published in:

Proceedings Electronic Components and Technology, 2005. ECTC '05.

Date of Conference:

31 May-3 June 2005