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Fast simulation of VLSI interconnects

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3 Author(s)
J. Jain ; Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA ; Cheng-Kok Koh ; V. Balakrishnan

This work introduces an efficient and accurate interconnect simulation technique. A new formulation for typical VLSI interconnect structures is proposed which, in addition to providing a compact set of modeling equations, also offers a potential for exploiting sparsity at the simulation level. Simulations show that our approach can achieve 50 × improvement in computation time and memory over INDUCTWISE (which in turn has been shown to be 400 × faster than SPICE) while preserving simulation accuracy.

Published in:

Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on

Date of Conference:

7-11 Nov. 2004