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A novel phase detector for PAM-4 clock recovery in high speed serial links

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2 Author(s)
Kahn Li Lim ; Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada ; Zilic, Z.

This paper presents a new method for multilevel clock recovery for high speed serial links. This all-digital implementation requires little overhead and no special encoding of data streams is required. A high speed 2-bit ADC is designed and presented for clock recovery purpose.

Published in:

SOC Conference, 2004. Proceedings. IEEE International

Date of Conference:

12-15 Sept. 2004

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