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TOP: an algorithm for three-level combinational logic optimisation

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5 Author(s)
E. Dubrova ; R. Inst. of Technol., LECS/IMIT, Kista, Sweden ; P. Ellervee ; D. M. Miller ; J. C. Muzio
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Three-level logic is shown to have a potential for reducing the area over two-level implementations, as well as for a gain in speed over multilevel implementations. A heuristic algorithm TOP is presented, targeting a three-level logic expression of type g/sub 1/spl deg//g/sub 2/, where g/sub 1/ and g/sub 2/ are sum-of-products expressions and '/sub /spl deg//' is a binary operation. For the first time, to the authors' knowledge, this problem is addressed for an arbitrary operation '/sub /spl deg//', although several algorithms for specified cases of '/sub /spl deg//' have been presented in the past. The experimental results show that, on average, the total number of product-terms in the expression obtained by TOP is about one third of the number of product-terms in the expression obtained by a two-level AND-OR minimiser.

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IEE Proceedings - Circuits, Devices and Systems  (Volume:151 ,  Issue: 4 )