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Testability-Driven Random Test-Pattern Generation

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4 Author(s)
Lisanke, R. ; Microelectronics Center of North Carolina, Research Triangle Park, NC, USA ; Brglez, F. ; de Geus, A.J. ; Gregory, D.

This paper presents ESPRIT, an automatic test pattern generation (ATPG) system for testing single stuck-at faults in combinational logic. ESPRIT generates test patterns by performing fault simulation on random patterns derived from nonuniformly distributed input signal probabilities. The system computes input signal probabilities that minimize a testability cost function. Using ESPRIT, we have observed orders-of-magnitude reduction in the number of random trials required to obtain a given fault coverage.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:6 ,  Issue: 6 )