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The isolation of a core through full I/O scan helps ease SOC test challenges; yet the performance of high-speed SOCs is significantly hampered. We propose a partial core encryption methodology wherein the core vendor unveils only a small part of the core logic, successfully satisfying core IP protection requirements. Once the partially encrypted cores are merged into an SOC, the system integrator performs test generation on the visible SOC logic only, greatly reducing the test generation effort expended. By utilizing the test data provided by the core vendor as well, the SOC integrator can test the SOC with no performance degradation. We present an efficient fault analysis based core encryption algorithm which is guided by judiciously computed testability measures. The experimental results confirm the significantly high encryption levels attained by the proposed encryption algorithm.