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A novel geometrical arrangement of unit cells in a digital-analog converter (D/A) converter, along with a new switching sequence results in full cancellation of gradient errors. This is achieved without using quad, quad-quad, or triple-quad techniques which increase the number of units by a factor of 4 or 16. In an M-b D/A, by proper arrangement of (2M-1) units in a matrix having odd number of rows and odd number of columns, a central unit is established allowing complete cancellation of gradient errors. The decoding logic has the same simplicity of a standard row-column decoder with the advantage of being half in size. This technique, called "symmetric-pair switching," avoids large routing between multiple subunits in quad, quad-quad and triple-quad techniques thus improving D/A performance. Another independent technique, "balanced-ring switching," is introduced for reduction of quadratic errors. This technique achieves an order of magnitude reduction in quadratic errors compared to the "Q2 Random Walk" technique.
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on (Volume:50 , Issue: 12 )
Date of Publication: Dec. 2003