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Buffer stage for fast response LDO

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1 Author(s)
Stanescu, C. ; Catalyst Semicond. Romania, Bucharest, Romania

The paper presents a buffer stage used in a fast response LDO processed in a double-metal 0.8 μm CMOS process. The stage consists of a transconductance amplifier (OTA) in a unity-gain configuration. The buffer has a wideband architecture and is designed to drive the parasitic gate-to-source capacitance of the power transistor. Output impedance is lower than 2kΩ and current consumption is less than 20μA.

Published in:

Semiconductor Conference, 2003. CAS 2003. International  (Volume:2 )

Date of Conference:

28 Sept.-2 Oct. 2003