By Topic

A VLIW processor with reconfigurable instruction set for embedded applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
A. Lodi ; Adv. Res. Center for Electron. Syst., Univ. of Bologna, Italy ; M. Toma ; F. Campi ; A. Cappelli
more authors

This paper describes a new architecture for embedded reconfigurable computing, based on a very-long instruction word (VLIW) processor enhanced with an additional run-time configurable datapath. The reconfigurable unit is tightly coupled with the processor, featuring an application-specific instruction-set extension. Mapping computation intensive algorithmic portions on the reconfigurable unit allows a more efficient elaboration, thus leading to an improvement in both timing performance and power consumption. A test chip has been implemented in a standard 0.18-μm CMOS technology. The test of a signal processing algorithmic benchmark showed speedups ranging from 4.3× to 13.5× and energy consumption reduced up to 92%.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:38 ,  Issue: 11 )