A 3.3 V, 512 Mb PROM uses a transistorless memory cell containing an antifuse and diode. A bit area of 1.4F2 including all overhead is achieved by stacking cells 8 high above the 0.25 μm CMOS substrate. Read bandwidth is 1 MB/s and write bandwidth is 0.5 MB/s. A 72 b Hamming code provides fault tolerance.
Published in:
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Date of Conference: 2003