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A 40/43 Gb/s SONET OC-768 4:1 MUX/CMU is implemented in a 120 GHz fT SiGe BiCMOS process. When co-packaged with a companion 16:4 multiplexer, the chip produces less than 3 ps of pattern dependent jitter and 175 fs RMS random jitter. A packaged BER of better than 10-14 is measured with 231-1 PRBS data inputs. The chip consumes 4.9 W from 1.8 V and -5.2 V supplies.
Date of Conference: 2003